III-N FET ON SILICON USING FIELD SUPPRESSING REO

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A III-N on silicon substrate with enhanced breakdown voltage including a rare earth oxide structure deposited on the silicon substrate and a layer of single crystal III-N semiconductor material deposited on the rare earth oxide structure. The rare earth oxide has a dielectric constant greater (approximately twice) than the III-N semiconductor material. The rare earth oxide structure is selected to cooperate with the layer of single crystal III-N semiconductor material to reduce the thickness of the layer of single crystal III-N semiconductor material required for a selected breakdown voltage to a value less than a thickness of the layer of single crystal III-N semiconductor material for the selected breakdown voltage without the cooperating single crystal rare earth oxide.