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VERTICAL TRANSISTOR HAVING UNIFORM BOTTOM SPACERS 发明申请

2023-12-09 4960 511K 0

专利信息

申请日期 2025-08-22 申请号 US15422724
公开(公告)号 US20170365713A1 公开(公告)日 2017-12-21
公开国别 US 申请人省市代码 全国
申请人 International Business Machines Corporation
简介 A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure that includes a fin on a semiconductor substrate, forming a source junction or a drain junction at an upper surface of the semiconductor substrate and at a base of the fin and epitaxially growing a rare earth oxide (REO) spacer to have a substantially uniform thickness along respective upper surfaces of the source or drain junction and on opposite sides of the fin structure.


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