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Low Defect Relaxed SiGe/Strained Si Structures on Implant Anneal Buffer/Strain Relaxed Buffer Layers 发明申请

2023-09-29 1660 225K 0

专利信息

申请日期 2025-06-24 申请号 US15047838
公开(公告)号 US20160322221A1 公开(公告)日 2016-11-03
公开国别 US 申请人省市代码 全国
申请人 International Business Machines Corporation
简介 A method provides a substrate having a top surface; forming a first semiconductor layer on the top surface, the first semiconductor layer having a first unit cell geometry; epitaxially depositing a layer of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry; ion implanting the first semiconductor layer through the layer of metal-containing oxide; annealing the ion implanted first semiconductor layer; and forming a second semiconductor layer on the layer of metal-containing oxide, the second semiconductor layer having the first unit cell geometry. The layer of metal-containing oxide functions to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer. A structure formed by the method is also disclosed.


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