客服热线:18202992950

Recessed single crystalline source and drain for semiconductor-on-insulator devices 发明授权

2023-05-29 4070 1728K 0

专利信息

申请日期 2025-06-25 申请号 US13285162
公开(公告)号 US8742503B2 公开(公告)日 2014-06-03
公开国别 US 申请人省市代码 全国
申请人 Geng Wang; Kangguo Cheng; Joseph Ervin; Chengwen Pei; Ravi M Todi
简介 After formation of a gate stack, regions in which a source and a drain are to be formed are recessed through the top semiconductor layer and into an upper portion of a buried single crystalline rare earth oxide layer of a semiconductor-on-insulator (SOI) substrate so that a source trench and drain trench are formed. An embedded single crystalline semiconductor portion epitaxially aligned to the buried single crystalline rare earth oxide layer is formed in each of the source trench and the drain trench to form a recessed source and a recessed drain, respectively. Protrusion of the recessed source and recessed drain above the bottom surface of a gate dielectric can be minimized to reduce parasitic capacitive coupling with a gate electrode, while providing low source resistance and drain resistance through the increased thickness of the recessed source and recessed drain relative to the thickness of the top semiconductor layer.


您还没有登录,请登录后查看下载地址


反对 0举报 0 收藏 0 打赏 0评论 0
下载排行
网站首页  |  关于我们  |  联系方式  |  使用协议  |  版权隐私  |  网站地图  |  排名推广  |  广告服务  |  积分换礼  |  网站留言  |  RSS订阅  |  违规举报  |  京ICP备2021025988号-4