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III-N FET ON SILICON USING FIELD SUPPRESSING REO 发明申请

2023-07-02 4090 494K 0

专利信息

申请日期 2025-07-10 申请号 US13232059
公开(公告)号 US20130062609A1 公开(公告)日 2013-03-14
公开国别 US 申请人省市代码 全国
申请人 Robin Smith; David Williams; Rytis Dargis; Michael Lebby
简介 A III-N on silicon substrate with enhanced breakdown voltage including a rare earth oxide structure deposited on the silicon substrate and a layer of single crystal III-N semiconductor material deposited on the rare earth oxide structure. The rare earth oxide has a dielectric constant greater (approximately twice) than the III-N semiconductor material. The rare earth oxide structure is selected to cooperate with the layer of single crystal III-N semiconductor material to reduce the thickness of the layer of single crystal III-N semiconductor material required for a selected breakdown voltage to a value less than a thickness of the layer of single crystal III-N semiconductor material for the selected breakdown voltage without the cooperating single crystal rare earth oxide.


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