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Multi-layer wiring board and its manufacturing method 发明授权

2023-07-25 1580 97K 0

专利信息

申请日期 2025-06-28 申请号 JP2008080833
公开(公告)号 JP5132387B2 公开(公告)日 2013-01-30
公开国别 JP 申请人省市代码 全国
申请人 Kyocera6633
简介 PROBLEM TO BE SOLVED : To provide a highly reliable multilayer wiring board in which a via convex from a surface of a board is reduced and moisture entry to an internal part of the board is suppressed, and to provide a method of manufacturing the board. SOLUTION : The multilayer wiring board includes an insulating substrate where a plurality of glass ceramic insulating layers are laminated and a through conductor in which gold or silver or copper formed inside the glass ceramic insulating layers constituting at least a surface layer is a main component. The through conductor includes glass comprising 40 to 60 mass% of Si by SiO2conversion, 5 to 15 mass% of Al by Al2O3conversion, 10 to 20 mass% of Ca by CaO conversion, 15 to 25 mass% of Ba by BaO conversion, and 1 to 8 mass% of rare earth elements by oxide conversion. COPYRIGHT : (C)2010, JPO&INPIT


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