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MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 发明申请

2023-08-11 3190 320K 0

专利信息

申请日期 2025-08-19 申请号 JP2010184563
公开(公告)号 JP2012044013A 公开(公告)日 2012-03-01
公开国别 JP 申请人省市代码 全国
申请人 RENESAS ELECTRONICS CORP
简介 PROBLEM TO BE SOLVED : To provide a technique capable of preventing increase in threshold voltage of an n-channel type MISFET and a p-channel type MISFET in a semiconductor device comprising a CMISFET having a high-dielectric gate insulating film and a metal gate electrode. SOLUTION : When a rare earth element or aluminum is introduced into an Hf-containing insulating film 5 that is a high-dielectric gate insulating film for the purpose of adjusting the threshold voltage of CMISFET, a threshold adjusting layer 8b made of a lanthanum film containing almost no oxygen and a threshold adjusting layer 8a made of an aluminum film containing almost no oxygen are formed on the Hf-containing insulating film 5 in an nMIS forming region 1B and a pMIS forming region 1A respectively. This configuration prevents oxygen from being diffused into the Hf-containing insulating film 5 and the principal surface of a semiconductor substrate 1 from the threshold adjusting layer 8a and the threshold adjusting layer 8b. COPYRIGHT : (C)2012, JPO&INPIT


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